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Open a Project
A project is the container for everything that follows — cells, models, studies, and results all live inside one. Open a saved project (.pro) file, or start a New Pack Design.
New Pack Design
Lock down target KPIs and build the cell-level electrochemical model before opening any solver — this wizard sets up every downstream simulation.
Projects
A project is the container for everything that follows — cells, models, studies, and results all live inside one. Open a saved project (.pro) file below, or reopen one of the projects you opened or saved recently in this browser.
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| Project Name | Pack Config | Cells | Status | Last Opened | File |
|---|
Define Application
Define objectives, chemistry & requirements
Before opening any solver, lock down what the simulation needs to answer.
Project Details
Application Context
Electrical Targets
to
Charging Requirements
Environmental & Operating Envelope
to
to
Thermal Management Target
Life & Safety Targets
Applicable compliance standards
Mechanical / Packaging Constraints
BMS / Control Scope
Notes
Output: Simulation requirement specification and target KPI sheet, used to configure every downstream model.
Pack Configuration
Cell & pack electrochemical design
Select the cell and BMS, set the pack architecture, then generate the cell model, pack sizing, compatibility checks and standards checklist.
Cell & Pack Design
Pulled live from the Cell database (Database > Cell Library). Built-in example cells that duplicate a datasheet entry are listed once.
Pulled live from the BMS database (Database > BMS Library). Checked for chemistry, OV/UV window, series range, current, over-temperature and sensor count.
Ns, Np and modules entered here are used by HV/LV Circuit, SOC/SOH and Report, so the pack is entered only once.
Output: Cell model (OCV, DCIR, currents, energy density), pack sizing (voltage window, energy, power, resistance, mass), cell-BMS checks, an ARAI AIS-156 / AIS-038 / IS 16893 / UN R100-R136 checklist, and a TBM (thermal battery model) file for downstream CFD linkage. Calculated server-side in PHP; the TBM file is generated by a Python background job.
Pack Configuration
BDS Cell Modeling
Four stages of the BDS cell-modeling workflow, run server-side in pure PHP (
inc/bds/*.php — a from-scratch port of the original Python module, no Python runtime required): HPPC-based ECM parameter extraction, EIS-based CNLS fitting, a Newman P2D finite-volume solver, and a joint parameter-identification driver. Click Run, then results appear below once the analysis finishes.Auto-generate test data from the selected Cell, BMS & calculation
Cell / BMS: select them in Pack Configuration.
(a) HPPC-Based ECM Parameter Extraction
Paste a time series spanning at least one full HPPC pulse plus its relaxation period.
(b) EIS-Based ECM/CNLS Fitting
Z_imag follows the usual EIS sign convention (negative = capacitive).
(c) Newman Pseudo-2D (P2D) Finite-Volume Solver
Uses a generic graphite/NMC 18650-class default parameter set (geometry, transport, OCP curves) — override the fields above; everything else uses documented illustrative defaults.
(d) Joint Parameter Identification (Cycler → P2D θ)
Fits θ = [Ds,neg, Ds,pos, kneg, kpos, Bruggeman] against the measured trace above via
identify_p2d_params(), starting from the same defaults as the P2D card. The forward model is the current-constrained reduced-order P2D solver of card (c); after auto-generation it uses the selected cell's electrode area and OCP.Thermal Analysis
STAR-CCM+ Module — Battery Pack Thermal Simulation
Resolves 3D-equivalent pack thermal behavior in pure PHP (
Battery Design Studio (BDS) supplies the per-cell heat-generation term used as the CHT source (I²R + entropic, from the ECM/P2D modules under Pack Configuration > Advanced Cell Modeling). Amesim would supply a pack-level current/voltage duty cycle as a boundary condition and can receive back a reduced RC-tree thermal network for fast co-simulation — both are external tools outside this app; the heat-generation and duty-cycle fields below are where that hand-off happens, entered directly for now.
inc/star/*.php — a from-scratch port of STAR-CCM+-Module-Equivalent.py, no Python runtime required): conjugate heat transfer across cell & coolant channel, coolant flow & pressure drop, and multi-physics thermal-runaway propagation for pack safety design.
Battery Design Studio (BDS) supplies the per-cell heat-generation term used as the CHT source (I²R + entropic, from the ECM/P2D modules under Pack Configuration > Advanced Cell Modeling). Amesim would supply a pack-level current/voltage duty cycle as a boundary condition and can receive back a reduced RC-tree thermal network for fast co-simulation — both are external tools outside this app; the heat-generation and duty-cycle fields below are where that hand-off happens, entered directly for now.
(a) Conjugate Heat Transfer — Cell & Coolant Channel
Coolant properties default to a typical 50/50 glycol-water mix; cell wetted area/cross-section default to the reference module's example geometry.
What this is (and isn't)
This is a fast, lumped-node thermal-circuit model — N cells and coolant nodes, each a single temperature, connected by conduction/convection resistances. It's a legitimate, standard first-pass screening tool: cheap enough to sweep dozens of coolant-flow or cell-spacing options in seconds, useful for narrowing a design space before committing to expensive real analysis. It is not a substitute for meshed 3D CFD (STAR-CCM+, Fluent, OpenFOAM) — those solve the Navier-Stokes equations with turbulence closure over an actual 3D mesh of thousands to millions of cells, resolving flow maldistribution, local hot spots, and boundary-layer effects this lumped model cannot see at all.
(b) Coolant Flow & Pressure Drop
(c) Calibrate Thermal-Runaway Kinetics from ARC Data
Fits the 4-reaction Arrhenius model's pre-exponential factors and activation energies against a real Accelerating Rate Calorimetry (ARC) self-heating trace, using the same multi-start Levenberg-Marquardt solver as the BDS joint parameter-ID. Mass fractions and reaction enthalpies (from cell teardown / DSC total-heat measurements) stay at illustrative defaults unless supplied below. A single narrow-range ARC trace typically only well-determines the lowest-onset-temperature reaction — the fit honestly reports this via the "well-determined" flag rather than presenting all 4 reactions as equally trustworthy.
Cell / BMS: select them in Pack Configuration.
Off: Ea held at the chemistry values, only the 4 pre-exponential factors A are fitted — one ARC trace rarely separates A from Ea.
(d) Multi-Physics Thermal-Runaway Propagation
A single value runs single-cell kinetics (the N=1 case has no neighbor terms, so it's mathematically identical). Add more values for a multi-cell pack propagation network. Limit 12 cells.
Uses a Kim/Hatchard-type 4-reaction Arrhenius abuse-kinetics model (SEI decomposition, negative-electrode/electrolyte, positive-electrode decomposition, electrolyte decomposition). Runaway onset (dT/dt > 10℃/min) is detected per cell; a very sharp runaway onset can outrun this explicit adaptive-step integrator, in which case results up to that point are still shown with a clear note.
Kinetics: using the reference module's illustrative parameter set (not calibrated against any specific cell's ARC/DSC data). Fit real data in card (c) above to calibrate.
(e) 3-D Cooling Simulation — Air / Liquid (reduced-order CFD/CHT)
Steady 3-D conjugate heat transfer on a voxel model of one module built from the real cell geometry: anisotropic cells, gaps / barriers, thermal interface and aluminium cold plate, with the coolant energy marched along every channel (liquid) or cell gap (air) and h / friction from Shah-London, Gnielinski, parallel-plate or Zukauskas correlations. Gives Tmax, cell-to-cell ΔT, coolant outlet temperature, pressure drop and pump / fan power, with top and side temperature maps. Not a Navier-Stokes solution - confirm final designs with full CFD or test.
Uses the cell, BMS and Ns / Np / modules set in Pack Configuration and the application set in Define Application.
Thermal Analysis
Thermal Imaging & Cooling Process Activation — Live Simulation
A lumped-RC thermal network (Bernardi heat generation, inter-module conduction, coolant convection) driving a staged hysteresis cooling controller, rendered as a false-color thermal-camera view that runs continuously below — not a pre-rendered animation. Eight physical modules (2×4 grid) are each a single lumped thermal node; heat flows to neighbors by conduction and to the coolant loop by convection, and a controller watches the pack's hottest module to escalate/de-escalate OFF → LOW → MEDIUM → HIGH with independent turn-on/turn-off thresholds per stage (so it doesn't chatter at a boundary). Runs entirely in the browser (a JavaScript port of the same formulas as
This is a "3D-equivalent" view in the sense that each module occupies a real 3D grid position — it is not a meshed 3D CFD domain. Eight lumped nodes cannot resolve within-module temperature gradients, coolant flow maldistribution, or local hot spots the way a true CFD mesh (thousands to millions of cells, solving Navier-Stokes with a turbulence model) does. Treat this as a live, cheap screening view of pack-level thermal behavior and controller logic — useful for tuning the cooling-stage thresholds quickly — not as a replacement for a meshed thermal-CFD study.
inc/thermal_imaging/*.php / the uploaded thermal.py) — simulated time runs faster than real time so the full heating/cooling cycle is visible without waiting.
This is a "3D-equivalent" view in the sense that each module occupies a real 3D grid position — it is not a meshed 3D CFD domain. Eight lumped nodes cannot resolve within-module temperature gradients, coolant flow maldistribution, or local hot spots the way a true CFD mesh (thousands to millions of cells, solving Navier-Stokes with a turbulence model) does. Treat this as a live, cheap screening view of pack-level thermal behavior and controller logic — useful for tuning the cooling-stage thresholds quickly — not as a replacement for a meshed thermal-CFD study.
Controls
Live Readout
Simulated Time
00:00
Cooling Stage
OFF
Fan/Pump Duty
0%
Load Current
0.0 A
T Max
25.0℃
T Mean
25.0℃
T Min
25.0℃
Box color = live simulated module temperature (thermal-camera IR palette, fixed display span 15–65℃). Dashed outline = the configured hotspot module. Thin lines = the inter-module conduction network.
Batch Simulation Result (server-side PHP, full duration)
Runs the identical physics once, server-side, for the full 1800s reference duration and returns a stage-transition timeline — useful for validating the live view above, or for a quick numeric summary without watching it play out.
BMS Design
Amesim Module — System-Level 0D/1D Simulation
Assembles BDS-exported cell models into a full pack circuit, runs BMS estimation/protection/balancing logic, and drives the pack with vehicle-level load — computed in pure PHP (
Battery Design Studio (BDS) exports the per-cell reduced-order model (OCV(SOC), R0/R1C1/R2C2) that this module replicates Ns×Np times to build the pack. STAR-CCM+ would supply a reduced thermal RC-network in place of a fixed cell temperature. MAGNET would supply the motor/inverter efficiency map used in the drive-cycle power-flow chain. All three are external tools outside this app; the cell/thermal/motor parameters below are where that hand-off happens, entered directly for now.
inc/amesim/*.php — a from-scratch port of Amesim-Module-Equivalent.py, no Python runtime required), fast enough for design-of-experiments sweeps.
Battery Design Studio (BDS) exports the per-cell reduced-order model (OCV(SOC), R0/R1C1/R2C2) that this module replicates Ns×Np times to build the pack. STAR-CCM+ would supply a reduced thermal RC-network in place of a fixed cell temperature. MAGNET would supply the motor/inverter efficiency map used in the drive-cycle power-flow chain. All three are external tools outside this app; the cell/thermal/motor parameters below are where that hand-off happens, entered directly for now.
(1) Pack Circuit (Ns×Np)
(2) BMS Protection & Balancing
(3) SOC/SOH Estimation (EKF + RLS + Aging)
The EKF starts intentionally offset from the true SOC, and the RLS resistance tracker starts intentionally seeded 20% low, to demonstrate convergence.
(4) Full Drive-Cycle Closed-Loop Simulation
Cell R0 / OCV / 2-RC model, current limits and BMS thresholds from the design (DESIGN-LINK).
Choose a standard drive cycle (MIDC, MIDC Part-1, WMTC, WLTC 3b, NEDC, UDDS, HWFET, US06 — 1 Hz regulatory speed traces) or the reference module's synthetic profile. For a standard cycle the duration is the cycle length × repeats. BMS protection thresholds and current limits use the same defaults as card (2) above.
(5) BMS Control Code Generation & SIL / HIL
Generates portable C99 BMS application code from this design - configuration (thresholds, delays, OCV table, ECM), state machine and protections, SOC/temperature current limits, passive balancing, an EKF SOC estimator, CAN 2.0 frames with a .dbc, and a 10 ms task with HAL hooks - plus SIL test vectors and expected outputs from the simulator's BMS logic, a SIL harness (make sil) and a python-can HIL replay script. If gcc is available on the server the SIL test is compiled and run here. Template-based generation, MISRA-C:2012-oriented style; not certified.
Uses the cell, BMS and Ns / Np / modules set in Pack Configuration and the application set in Define Application.
Circuit Design
MAGNET Module
Magnetostatic/Eddy-Current FEA on Busbars, Contactors & Current Sensors — 2D magnetostatic and phasor eddy-current field solves for busbar cross-sections (field, Maxwell-stress force, skin/proximity-effect AC loss), a contactor reluctance-network + coenergy force model with armature pull-in dynamics, and Hall-effect/Rogowski/shunt current-sensor transfer functions.
Module Cell Connection & BMS Wiring
Series / parallel cell connection of the module — prismatic: top (terminal-side) view; cylindrical: top and bottom views with the strips on both faces — balancing (cell-sense) wire taps B0…Bn and NTC positions, and the BMS connection diagram for the selected BMS with balance and signal pin tables.
HV/LV Electrical Circuit Diagram
Module & Pack, Input to Output — 2D Schematic & 3D Layout Generator. Builds the HV power chain (modules → service disconnect → contactor/precharge → fuse → current sensor → DC bus) and the parallel HVIL loop & LV BMS network, rendered as a 2D single-line schematic and a live, rotatable 3D layout.
Circuit Design
Module Cell Connection & BMS Wiring
Generates the series / parallel busbar layout of one module (prismatic: top view; cylindrical: top and bottom views), the balancing wire taps and NTC positions, and the BMS connection diagram for the selected BMS, with balance-connector (J1) and signal (J2) pin tables. Values come from Pack Configuration and can be changed here. Drawings are generated on the server.
Module & BMS
Circuit Design
MAGNET Module — Magnetostatic/Eddy-Current FEA on Busbars, Contactors & Current Sensors
Pack-level electrical hardware EM analysis, computed in pure PHP (
Amesim would supply the pack current profile (drive-cycle Ipack(t), fault/short-circuit transients) as the excitation for this analysis. STAR-CCM+ would receive the I²R Joule-loss distributions computed here as volumetric heat sources for conjugate heat transfer, and could return busbar temperature back for a resistivity update. Both are external tools outside this app; the current/frequency fields below are where that hand-off happens, entered directly for now.
inc/magnet/*.php — a from-scratch port of circuit.py, no Python runtime required): busbar magnetostatic field/force, eddy-current skin/proximity-effect AC loss, contactor solenoid actuation, and current-sensor models.
Amesim would supply the pack current profile (drive-cycle Ipack(t), fault/short-circuit transients) as the excitation for this analysis. STAR-CCM+ would receive the I²R Joule-loss distributions computed here as volumetric heat sources for conjugate heat transfer, and could return busbar temperature back for a resistivity update. Both are external tools outside this app; the current/frequency fields below are where that hand-off happens, entered directly for now.
(a) Busbar Magnetostatic FEA — Field & Force
(b) Eddy-Current / Skin Effect — AC Loss
(c) Contactor Solenoid — Reluctance Network & Pull-In Dynamics
A large enough hold current relative to the spring constant will snap the armature fully closed (gap → 0) — this is normal contactor closing behavior, not an error; the closed-form force law isn't clamped at contact, so times after that point aren't physically meaningful.
(d) Current Sensors — Hall (Open/Closed-Loop), Rogowski, Shunt
Circuit Design
HV/LV Electrical Circuit Diagram — Module & Pack, Input to Output
Builds the HV power chain and LV BMS/control network for a battery pack — from cell modules (input) through contactors, fuse, current sensor, to the DC bus output (output) — computed in pure PHP (
Path: Input (cell modules) → Service Disconnect → [+] Contactor (∥ Precharge) → Fuse → Current Sensor → DC Bus Output → [−] Contactor → back to Input. A parallel HVIL sense loop and a separate LV BMS network (master, per-module slaves, coil drivers, isolation monitor) are modeled alongside the same component set.
inc/hvlv/*.php — a from-scratch port of hv-lv.py, verified byte-for-byte against the Python original's binary STL output). Rendered two ways: a 2D single-line schematic (SVG) and a live, rotatable 3D layout (STL, parsed and drawn in this page with a small hand-written binary-STL reader — no external CAD viewer plugin).
Path: Input (cell modules) → Service Disconnect → [+] Contactor (∥ Precharge) → Fuse → Current Sensor → DC Bus Output → [−] Contactor → back to Input. A parallel HVIL sense loop and a separate LV BMS network (master, per-module slaves, coil drivers, isolation monitor) are modeled alongside the same component set.
Pack Configuration
Module footprint is calculated from the selected cell's actual geometry and packing parameters below — not a fixed placeholder size.
Manufacturing & Sizing Parameters (DFM)
DFM & Manufacturability
Real module dimensions calculated from the selected cell's actual geometry (not a fixed placeholder), a worst-case tolerance stack-up check, corrected fuse/precharge-resistor sizing (rounded to actual standard catalog ratings, with temperature derating applied), and recommended joining methods by connection current. Run Compute Topology & Sizing above first.
2D Single-Line Schematic
Input (cell modules) → Service Disconnect → [+] Contactor (∥ Precharge) → Fuse → Current Sensor → DC Bus Output → [−] Contactor → back to Input, rendered directly from the same topology used for the 3D layout below. Solid heavy lines are the HV power path, dashed heavy-spaced lines are the HVIL loop, and light dashed/solid lines are the LV signal/power network.
3D Layout — Live View
Rendered from the same topology's real 3D component positions and calculated module dimensions, now including compression end plates on each module and a simplified enclosure shell (base tray, walls, cover) around the full assembly — this is still a geometric visualization sized from real engineering parameters, not a manufacturing-ready mechanical drawing (no boolean-cut enclosure, fasteners, seals, or structural analysis). Exported as STL and parsed live in this page. Drag to rotate, scroll to zoom.
Reports
Complete System Simulation & Report
Runs one consistent pack configuration through every analysis module built in this app — Cell & Pack electrochemical model, HPPC parameter extraction, conjugate heat transfer, full drive-cycle closed loop, busbar EM FEA, HV/LV circuit topology & sizing, and thermal-imaging cooling simulation — then assembles the results into one downloadable/printable report. Each stage calls the same server-side endpoint already used by its own screen elsewhere in the app; nothing here is a separate implementation.
Pack Configuration (shared across all stages)
Progress
Safety & Compliance
Full Pack Quality, Safety & BIS Compliance Verification
Not a certification tool
The test names, pass-criteria structure, and typical thresholds below illustrate how a BIS/AIS-156-style compliance calculation is organized. Indian standards are periodically amended (e.g. the AIS-156 thermal-propagation amendment) — confirm exact clause numbers and limits against the current published standard before using this for actual certification.
Track A — Electrical Performance Verification: measured pack performance checked against Stage 0–1 design targets with tolerance bands.
Track B/C — Mandatory Safety Tests: binary pass/fail gates — no averaging or tolerance banding applies to safety-critical tests. A single failure blocks release regardless of the electrical performance score.
Track B/C — Mandatory Safety Tests: binary pass/fail gates — no averaging or tolerance banding applies to safety-critical tests. A single failure blocks release regardless of the electrical performance score.
Run the full test set for this design
Sets every card below up from Pack Configuration (pack capacity, energy, voltage, resistance and gross mass, which selects the AIS-156 shock / vibration profile), runs tests 1–8 and computes 9. Final Quality Pass Index. The "measured" values and observation boxes start at the design / expected result: replace them with the accredited-laboratory results before release. Inputs, results and the release decision are saved with the project (.pro) and go into the report.
1. Capacity & Energy Verification
Pack-level capacity and energy from the discharge-test simulation, checked against the Stage 0 nameplate target within a manufacturing/model tolerance band.
2. Internal Resistance Verification
End-to-end pack resistance, including busbar/connector contributions finalized in Stage 3, checked against the design ceiling.
3. HV Isolation Resistance Verification
Insulation resistance between the HV bus and chassis ground, normalized per volt of working voltage, per typical Indian/international EV safety practice.
4. Overcharge Test Mandatory Safety Gate
Per AIS-156 Annex 8G: charged at ≥C/3 rate; test continues until the device auto-interrupts/limits charging, or — if there is no such function, or it fails to trigger — until charged to 200% of rated capacity. Pass criteria: no electrolyte leakage, no rupture, no fire, no explosion, and post-test isolation resistance ≥100 Ω/V.
5. External Short-Circuit Test Mandatory Safety Gate
Per AIS-156 Annex 8F: terminals shorted through a connection resistance not exceeding 5 mΩ, held until protection trips or case temperature stabilises. Pass criteria: no electrolyte leakage, no rupture, no fire, no explosion, and post-test isolation resistance ≥100 Ω/V.
6a. Mechanical Drop Test Mandatory Safety Gate
Per AIS-156 Annex 8C (removable REESS): free fall from 1.0 m, six drops from different orientations, SOC at test start ≥90% of rated capacity. AIS-156 has no separate "crush" test — this drop test and the mechanical shock test below are the mechanical abuse tests it actually specifies.
6b. Mechanical Shock Test Mandatory Safety Gate
Per AIS-156 Annex 8D: half-sine shock pulse, 18 shocks total (3 positive + 3 negative on each of 3 perpendicular axes). Required pulse: 1500 m/s² peak / 6 ms for packs under 12 kg, or 500 m/s² peak / 11 ms for 12 kg and over.
7. Vibration Test Mandatory Safety Gate
Per AIS-156 Annex 8A: sinusoidal logarithmic sweep 7–200 Hz and back, 15 minutes per sweep, repeated 12 times (3 hours total), vertical axis. Required peak acceleration: 80 m/s² for packs under 12 kg, or 20 m/s² for 12 kg and over.
8. Protection Response Time Verification Mandatory Safety Gate
Fault injection across the full fault registry (voltage, current, temperature, insulation) with measured trip time checked against the Stage 2 BMS database, per fault code. Note: AIS-156 verifies these protections as part of the overcharge/over-discharge/over-temperature/short-circuit tests themselves rather than as a separately timed test — this card reflects common internal BMS validation practice, not a distinct AIS-156 clause.
9. Final Quality Pass Index & Compliance Matrix
Rolls every gate above into a single release decision. Safety tests (Track B, C) are strict pass/fail — a single failure or un-run gate blocks release regardless of the electrical performance score. Performance tests (Track A) contribute a weighted Quality Index once every safety gate has passed. Run the tests above (in any order) first, then compute the matrix here.
10. Thermal Runaway & Propagation AIS-156 thermal-propagation screening
One module as a 2-D network of cells (one thermal node per cell): per-cell Arrhenius abuse kinetics for the selected cell (SEI, anode, cathode, electrolyte), internal short after separator melt limited to the stored energy, venting, conduction through the real gap / barrier, busbars and base, radiation. The trigger cell is driven into runaway (heater, nail or over-temperature) and every neighbour is tracked; the barrier options are compared automatically. Screening only - the AIS-156 / IEC 62619 propagation test is still required.
Uses the cell, BMS and Ns / Np / modules set in Pack Configuration and the application set in Define Application.
11. Cell Behaviour & Life / Warranty Prediction
Cell behaviour: deliverable capacity and energy vs C-rate and temperature from the cell ECM. Life / warranty: a fleet Monte-Carlo on the physics-based ageing model (SEI, cracks + LAM, lithium plating, knee) calibrated to the cell datasheet cycle rating - every simulated vehicle / site draws its daily use, Indian city climate and fast-charge share; result: expected claim rate, SOH distribution at the end of warranty and the longest warranty that keeps claims under the target.
Uses the cell, BMS and Ns / Np / modules set in Pack Configuration and the application set in Define Application.
12. Application Duty Cycle & BMS Logic Verification
The BMS firmware logic (state machine, debounced OV / UV / OC / short / OT / UT / sensor / pre-charge protections, SOC- and temperature-based current limits, CV taper, passive balancing, SOC) in closed loop with the pack over a full application day - EV: standard drive cycle to the daily distance, park, CC-CV charge, rest; ESS: solar charge and evening load - followed by a fault-injection matrix with detection time vs requirement. The same logic is emitted as C code in BMS Design > (5).
Uses the cell, BMS and Ns / Np / modules set in Pack Configuration and the application set in Define Application.
Housing
Battery Pack Housing
Vehicle-Space-Driven, 3D-Printable Module & Pack Housing Design Generator — the parametric mechanical housing layer that sits underneath the rest of the Simcenter-style workflow (BDS cell models, STAR-CCM+ thermal, Amesim system/BMS, MAGNET electromagnetics). Derives every housing dimension directly from the actual available vehicle package space and exports print-ready STL meshes.
Housing
Battery Pack Housing — Vehicle-Space-Driven, 3D-Printable Module & Pack Housing Design Generator
This screen is set up and reachable from the Housing menu, but the actual geometry generator hasn't been built yet — the source file (
housing.py) referenced for this conversion wasn't attached to that request, so there's nothing yet to port. Please attach housing.py and I'll convert it the same way as the BDS/STAR-CCM+/Amesim/thermal-imaging modules: a verified PHP port (mesh primitives, the VehiclePackageEnvelope/cell/module dataclasses, the pack layout calculator, module & pack housing generators, printability checks) plus an STL export endpoint, cross-checked against the Python original at matched inputs before anything ships.
View
Designed Battery Pack / Module Parameter Analysis — SOC/SOH
Runs the pack or module you have configured (cell selection, series/parallel topology, and its current capacity & resistance test data) through a State-of-Charge and State-of-Health health check: basic coulomb-counting SOC, an OCV+Coulomb-Counting+temperature+current+Kalman-filter corrected SOC estimate, and both capacity-fade and resistance-growth SOH metrics — with a result table and charts to support a pack quality/release decision.
View
Designed Battery Pack / Module Parameter Analysis — SOC/SOH Analysis
Basic SOC uses coulomb counting: SOC(t) = SOC(t₀) + (η/Qnom)∫I(t) dt. Because a real current sensor has a small bias and the nameplate capacity drifts with age, that basic count alone drifts away from the truth over time. The advanced estimate corrects for this by combining the same coulomb count with an OCV(SOC) voltage model, temperature, the measured current, and a Kalman filter (the same EKF engine used in BMS Design → Amesim → SOC/SOH Estimation) that periodically pulls the estimate back toward the truth using the pack's terminal voltage. SOH is reported two ways: capacity fade (SOHcapacity = Qavailable/Qrated×100) and resistance growth (SOHR, from Raged/Rnew) — the worse of the two drives the overall quality verdict.
1. Designed Pack / Module
Selecting a cell auto-fills nameplate capacity/resistance/voltage window below, scaled by Ns/Np; every field stays editable so measured test data can be entered directly.
2. Capacity & Resistance Test Data (aging / quality state)
Leave Qavailable = Qnom and Raged = Rnew to analyze a brand-new pack; enter capacity-test / EIS-test results to analyze an aged one.
3. Current / Load Profile for the SOC Run
2. Calendar & Cycle Ageing (physics-based)
Reduced-order physics ageing, using the same mechanisms as the PyBaMM / COMSOL / GT-AutoLion ageing sub-models: SEI growth (mixed reaction / solvent-diffusion limited, faster at high SOC and temperature), SEI on particle cracks and stress-driven loss of active material from cycling, partially reversible lithium plating when the graphite surface potential falls below 0 V (cold or fast charging), and capacity = min(lithium inventory, anode capacity) so a LAM-driven knee appears when the anode excess is used up. The cycle-fade rate is calibrated so the model reproduces the selected cell's datasheet cycle-life rating at its stated test conditions. Uses the cell selected in card 1.
Database
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Import .dat
| Name | Chemistry | Capacity (Ah) | Voltage (V) | Status | Cycle Life | Max C-Rate | Last Modified |
|---|
Summary
Discharge Curve
Safety Data
Sourcing
Database
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Import .dat
| Name | Manufacturer | Category | Cell Chemistry | Max Series Cells | Status | Last Modified |
|---|
Summary
Protection
Balancing & Sensing
Comms & Switching
Power & Diagnostics
Compliance & Sourcing
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Import .dat
| Name | Cooling Type | Coolant | Design Target ΔT | Status | Last Modified |
|---|
Summary
Thermal Performance
Material Properties
Heating
Fluid & Electrical
Sensors & Sourcing
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| Name | Manufacturer | Category | Rating | Status | Last Modified |
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Summary
Voltage & Current
Isolation & Safety
I/O & Switching
Balancing & Thermal
Comms & Diagnostics
Power & Mechanical
Diagnostics & Sourcing
Database
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Import .dat
| Name | Manufacturer | Category | Conductor Material | Status | Last Modified |
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Summary
Electrical Properties
Current Ratings
Thermal Performance
Insulation & Dimensions
Sourcing
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| Name | Manufacturer | Type | Material | Status | Last Modified |
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Thermal & Hydraulic
Mechanical
Compliance
Sourcing
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Import .dat
| Name | Category | Rating | Vendor | Status | Last Modified |
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Electrical Ratings
Conductor & Mechanical
Compliance
Sourcing
New Part Specification
The part specification is the blueprint for a discrete pack-level part: its ratings, compliance, and sourcing. Every BOM and pack design references one from the Master PCB, Busbar, ColdPlate, or Other Parts library.
New ColdPlate Specification
The cold-plate datasheet is the thermal, hydraulic and mechanical blueprint for a liquid cold plate used under battery modules or pack power electronics. Every pack design in the ColdPlate Library references one of these records.
New Part Specification
The part datasheet is the electrical, mechanical and compliance blueprint for a pack-level part: HV / LV wire, MSD, fuse, contactor, HV connector or cable assembly, signal harness, enclosure, cover, cell holder, cell busbar, sensor, vent, IMD or pre-charge resistor.
New Cell Specification
The cell datasheet is the electrochemical and mechanical blueprint for a single cell — its ratings, geometry, and safety limits. Every pack design and simulation in the Cell Library references one of these records.
New BMS Specification
The BMS datasheet is the electrical, protection, and communications blueprint for a battery management system module. Every pack design and simulation in the BMS Library references one of these records.
New BTMS Specification
The BTMS datasheet is the thermal, material, and fluid/electrical blueprint for a battery thermal management component. Every pack design and simulation in the BTM Library references one of these records.
New M-PCB Specification
The Master PCB datasheet is the electrical, isolation, I/O, and functional-safety blueprint for a master BMS carrier/controller board. Every pack design and simulation in the M-PCB Library references one of these records.
New Busbar Specification
The busbar datasheet is the electrical, current-carrying, thermal, and insulation blueprint for a rigid conductor interconnect. Every pack design and simulation in the Busbar Library references one of these records.